Fluke 9000A-8051 Interface
Fabricante:
Modelo:
9000A-8051
Data:
1984
Categoria:
Grupo:
Descrição:
Interface Pod

Informação

PURPOSE OF Interface POD The 9000A-8051 Interface Pod interfaces any 9000 Series Micro System Troubleshooter to equipment using an 8051- or 8044-family microprocessor. The Micro System Troubleshooter (referred to hereafter as the Troubleshooter) is used to service printed circuit boards, instruments and systems that use a microprocessor. The 9000A-8051 Interface Pod (referred to as the Pod) adapts the general purpose architecture of the Troubleshooter to a specific architecture of the 8051 and 8044 microprocessor families. The Pod adapts such microprocessor-specific functions as pin layout, status/control functions, interrupt handling, timing, and memory and I/O addressing.

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Serviço e Manual do Usuário
Tipo de manual:
Serviço e Manual do Usuário
Páginas:
42
Tamanho:
1.75 Mbytes (1837934 Bytes)
Idioma:
english
Revisão:
ID de manual:
744698
Data:
1984 10 01
Qualidade:
Scaned documento, todas legível.
Data de upload:
2018 01 16
MD5:
d4130728f8c3598c85a6e49ad4a3db36
Downloads:
482

Informação

1-1. PURPOSE OF Interface POD ... 1-1 1-2. DESCRIPTION OF POD ... 1-1 1-3. SPECIFICATIONS ... 1-3 1-4. COMPATIBLE MICROPROCESSORS ... 14 2 INSTALLATION AND SELF TEST ... 2-1 2-1. INTRODUCTION ... 2-1 2-2. INSTALLING A MICROPROCESSOR INTO THE POD ... 2-1 2-3. CONNECTING THE POD TO THE UUT ... 2-1 2-4. PERFORMING THE POD SELF TEST ... 2-3 2-5. INITIALIZATION ... 2A 3 MICROPROCESSOR DATA ... 3-1 3-1. INTRODUCTION ... 3-1 3-2. MICROPROCESSOR SIGNALS ... 3-1 4 OPERATING CHARACTERISTICS ... 4-1 4-1. INTRODUCTION ... 4-1 4-2. STATUS/ CONTROL LINES ... 4-1 4-3. Introduction ... 4-1 4-4. Status Line Bit Assignments ... 4-2 4-5. Control Line Bit Assignments ... 4-3 4-6. FORCING AND INTERRUPT LINES ... 4-3 4-7. ADDRESS SPACE ASSIGNMENT ... 4-3 4-8. Introduction ... 4-3 4-9. External Memory ... 4-4 4-10. Internal RAM, Registers, and Stack ... 4-4 4-11. Internal Program ROM ... 4-5 4-12. Diagnostic Addresses ... 4-5 4-13. Quick-Looping Test Addresses ... 4-5 4-14. Quick ROM and RAM Test Addresses ... 4-7 4-15. Block Write and Verify Addresses ... 4-7 4-16. Special Addresses ... 4-7 4-17. QUICK-LOOPING READ AND WRITE FUNCTIONS ... 4-7 4-18. SPECIAL ADDRESSES ... 4-10 4-19. Sell Test Failure Code ... 4-10 4-20. Status and Error Reporting Group ... 4-10 4-25. Error Reporting Masks ... 4-12 4-29. Address and Data Errors ... 4-13 4-33. Bus Tests ... 4-13 4-38. Refresh Enable ... 4-14 4-39. Mode Switch Manipulation ... 4-14 4-42. Quick Memory Tests ... 4-14 4-45. Block Memory Tests ... 4-19 4-46. CHARACTERISTICS OF THE LEARN OPERATION ... 4-21 ~ 4-47. CHARACTERISTICS OF BUS TEST ... 4-21 4-48. RUN UUT Limitations ... 4-22 f £ 4-52. ACTIVE ALE SIGNAL ... 4-22 4-53. Probe SYNCHRONIZATION MODES ... 4-22 & <: 4-54. MARGINAL UUT PROBLEMS ... . ... 4-55. Introduction ... 4-23 4-56. UUT Operating Speed and Memory Access ... 4-23 ; ; I 4-57, UUT Noise Levels ... 4-23 ' 4-58. Bus Loading ... 4-23 I q) 4-59. Clock Loading ... 4-23 4-60. POD DRIVE CAPABILITY ... 4-23 ( 4-61, DRIVABILITY TESTING ... 4-23 4-62. I/O Ports ... 4-23 4-63. Special Function Registers ... 4-24 ^ 1 4-64. UUT POWER DETECTION ... 4-24 L—4-65. CLOCK SOURCES, SETUPS, AND PROBLEMS ... 4-24 4-66. EFFECTS OF THE CONFIGURATION SWITCHES ... 4-24 4-67, Introduction ... 4-24 4-68. Switch i (Port 0) ... 4-25 4-74. Switch 2 (Port 2) ... 4-26 4-80. Switch 3 (P3.2) ... 4-26 4-82. Switch 4 (P3.3) ... 4-26 4-84. Switch 5 (P3.6/P3.7) ... 4-27 4-88. Switch 6 (UUT Connection) ... 4-27 4-91. Switch 7 (CLK Source) ... 4-27 4-93. Switch 8 (External CLK) ... 4-27 5 THEORY OF OPERATION ... 5-1 5-1. INTRODUCTION ... 5-1 5-2. GENERAL POD OPERATION ... 5-1 5-3. Processor Section ... 5-1 5-4. UUT Interface Section ... 5-4 5-5. Timing and Control Section ... 5-4 5-6. UUT Power Sensing ... 5-5 5-7, DETAILED BLOCK DIAGRAM DESCRIPTION ... 5-5 5-8. Detailed Description of the Processor Section ... 5-5 5-9. Detailed Description of the UUT Interface Section ... 5-9 5-10. Detailed Description of the Timing and Control Section ... 5-10 5-12. UUT Power Sensing ... 5-10 5-13. Detailed Description of the Self Test Circuit ... 5-10

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