Geräte Informationen:

Fairlight ESP CMI Model IIx Music Workstation
Hersteller:
Fairlight ESP
Modell: CMI Model IIx
Datum:
Kategorie: Bühnen- Studiotechnik
Gruppe: Music Workstation
Beschreibung: Computer Music Instrument
Informationen:
                                    The Fairlight Computer Musical Instrument is a complete
music production and performance instrument. It is a special
purpose computer system incorporating a custom dual M6809
central processor interfaced to special input-output devices
optimised for the rather unusual requirements of music
production.


The C.M.I. is a complex special-purpose computer system
which embraces many different hardware and software
technologies. All processing and sound generation functions
are performed by the Mainframe, while the Graphics Terminal
and Keyboards serve as peripherals for operator interfacing.

The mainframe is capable of operating quite autonomously,
that is, it is not reliant on any external connections for
proper functioning. Under certain conditions it is possible
for a fault condition to inhibit proper Mainframe operation,
so the serviceperson should be wary of being mislead. Of
course, without the peripherals connected it is often hard
to know if the system is functioning properly, but this
point should be borne in mind when troubleshooting.

Operator input to the Mainframe comes from three sources:
music keyboard, alphanumeric keyboard and lightpen.

Output devices include the Graphics Display terminal and the
audio outputs. A printer may also be optionally used.

The heart of the system is the Central Processing Module,
which U3es two Motorola 6809 microprocessors in a
dual-processor configuration. Both processors share a common
buss which allows them both to communicate with the other
cards in the Mainframe.

The Processor Control Module provides EPROM for system
startup and bootstrap, RS-232C serial input from the
keyboard, serial output to the keyboard and printer, and
various other C.P.U. support functions such as interrupt
prioritisation.

Main program memory is the 256K RAM card. This holds all the
operational software, much of which is overlayed from disk
as the code exceeds 25ÖK.

The Floppy-disk controller uses Direct Memory Access
techniques to transfer data between memory and the two
floppy-disk drives.

The Graphics Display is a bit-mapped image of 16K bytes of
VRAM. This is displayed as an array of 256 by 512 points.
Special hardware provides support functions for automatic
vector drawing, which considerably enhances the speed of
displaying graphical Information. Hit and touch signals from
the Lightpen are interfaced to the system buss.

Eight identical Voice Modules also share the buss. They each
have 16K bytes of waveform RAM, as well as all the control
and audio circuits required to support it.

A Voice Master module controls the voice modules, as well as
providing the Analog-to-Digital converter function of the
system.

Audio from the Voice Modules is buffered by the Audio Output
Module, which provides independent balanced outputs for each
channel as well as a mixed (LINE) output.

Folgende Anleitungen sind hier verfügbar:

Fairlight ESP -- CMI Model IIx -- Service- und Bedienungsanleitung
Dateiname: Fairlight-9306-Manual-Page-1-Picture
Dokumenttyp: Service- und Bedienungsanleitung
Seitenanzahl: 379
Dateigröße: 28.91 Mbytes (30319496 Bytes)
Sprache: Englisch
Revision: 2.1
Dokument-ID/Nummer:
Datum:
Qualität: Gescanntes Dokument, teilweise schwer oder teilweise nicht zu lesen.
Upload Datum:
MD5: b61ed70ff2c6cc52e6adadd847094c18
Downloads: 22 seit dem 16 August 2017
Informationen:
1.	INTRODUCTION
...................................................................1

1.1	Card Cage
............................................................1

1.2	Audio Board
.....................................................1

1.3	Power Supply
........................................................1-

1.4	Floppy-Disk Drives
.................................................1

1.5	External Connections
...................................................................2

Figure 1. C.M.I. Mainframe Block Diagram
............................3

2.	SYSTEM OVERVIEW
..................................................	4

2.1	General Principles
.......................................................4

2.2	Hardware/Software Relationships
......................................5

2.2.1	System Startup/Boot
........................................5

2.2.2	Disk Operations
..............................................5

2.2.3	Lightpen/Graphics Display
................................6

2.2.4	Command Entry
...................................................6

2.2.5	Loading/Saving Sounds
........................................6

2.2.6	Sound Sampling
.........................................................7

2.2.7	Music Playing
....................................................7

2.2.8	Music Keyboard Functions
.......................................8

2.2.9	Keyboard Sequencer
..............................................8

2.2.10	Music Composition Language
..................................9

3* SPECIFICATIONS
...........................................................10

3.1	ELECTRICAL
.....................................................10

3.2	AUDIO
...........................................................10

3 - 3 DIGITAL
..........................................................11

3.4 MECHANICAL
................................................--------11

4. FUNCTIONAL DESCRIPTION
.................................................12

4.1 Q-209 DUAL 6809 CPU FUNCTIONAL DESCRIPTION
.........................12

4.1.1	INTRODUCTION
.................................................12

4.1.2	TIMING & MEMORY CONTROL LOGIC
....................................12

4.1.2.1	Master Timing Signals ..............................12

4.1.2.2	Dynamic Memory Timing Signals .......................12

4.1.2.3	Data, Address Buss Multiplexing ..................13

4.1.2.4	Interrupt Strobe Generation
........................................13

4.1.2.5	Direct Memory Aücess
.......................................13

4.1.3	CPU MEMORY SWITCHING, & VECTORS
................................................14

4.1.3.1	Vector-Fetch Decoders ..............................14

4.1.3.2	Processor System Control
.........................................14

4.1.3*3 Automatic Map Switching
....................................15

4.1.3.4 Hardware Trace
...............................................15

4.1.3*5 Indivisable Instructions
...............................16

4.1.3-6 Link Options
....................................................16
4.2	Q133 CPU CONTROL CARD FUNCTIONAL DESCRIPTION
..................................17

4.2.1	INTRODUCTION
................................................................17

4.2.1.1	Address Map
........................................................................17

4.2.1.2	Restart and Interrupt Vectors
....................................17

4.2.1.3	Debug Monitor ROM ..................................18

4.2.1.4	System Boot/Disk ROM
......................................................19

4.2.2	ADDRESS DECODING & RAM REFRESH CONTROL
.....................20

4.2.2.1	Address Decoding
..............................................................20

4.2.2.2	RAM Refresh Control
....................................20

4.2.3	EPROM, RAM, ACIA, PIA
............................................21

4.2.3.1	Static RAM
..........................................................................21

4.2.3-2	EPROM
.............................................................................21

4.2.3-3	ACIA
......................................................................................21

4.2.3.4	PIA
..............................................................22

4.2.4	MANUAL CONTROLS, POWER-ON RESET
.............................22

4.2.4.1	Manual Controls
..............................................22

4.2.4.2	Power-on Reset
..................................................................22

4.2.5	INTERRUPT PRIORITY LOGIC & DATA BUFFERS
................................23

4.2.5.1	Interrupt Priority Logic	....................23

4.3	Q-256 256K RAM CARD FUNCTIONAL DESCRIPTION
....................................24

4.3.1	INTRODUCTION
......................................................................................24

4.3.1.1	Options
.......................................................................................24

4.3.2	ADDRESS DECODING & MAPPING LOGIC
..............................................25

4.3.2.1	Map Selection Logic
.........................................25

4.3.2.2	Address Translation
........................................................27

4.3.2.3	Memory Block Decoding .............................28

4.3.3	BUSS INTERFACE
..................................................................................29

4.3.4	PARITY SYSTEM
................................................29

4.3.5	MEMORY ARRAY
......................................................................................30

4.4	QFC9 FLOPPY DISK CONTROL FUNCTIONAL DESCRIPTION
............................31

4.4.1	INTRODUCTION
......................................................................................31

4.4.1.1	Address Map .....................................32

4.4.1.2	Commands
...............................................................33

4.4.2	DATA BUFFERS, DMA ADDRESS COUNTER
............................................33

4.4.2.1	DMA Address Counters
......................................................33

4.4.2.2	DMA Byte transfer counters .........................33

4.4.2.3	Data Buffers
.........................................................34

4.4.3	ADDRESS DECODING, CONTROLLER
L.S.1..........................................34

4.4.3«1 Address Decoding
..............................................................34

4.4.3.2 Controller L.S.I.
...............................................34

4.4.4	DMA LOGIC
....................................................................34

4.4.5	CONTROL REGISTER
.............................................................35

4.4.6	MASTER OSCILLATOR
............................................................................35

4.4.7	WRITE PRECOMPENSATION
....................................................................35

4.4.8	DATA SEPARATOR
..................................................................................36

4.4.9	DEVICE DRIVER ROM
............................................................................36
4.5	Q219 LIGHTPEN/GRAPHICS SYSTEM FUNCTIONAL DESCRIPTION
..................37

4.5.1	INTRODUCTION
......................................................................................37

4.5.2	VIDEO TIMING LOGIC
..........................................................................38

4.5.2.1	Dot Clock Generation
......................................................38

4.5.2.2	Video FIFO and Shift Register
....................................38

4.5.2.3	Video Output
..................................................................39

4.5.3	SELECT LOGIC AND DATA CONTROL
....................................................39

4.5.3*1 Address Decoding
..............................................................39

4.5.3«2 Data Buffers
......................................................................40

4.5.4	VRAM ADDRESSING LOGIC
....................................................................40

4.5.4.1	Addressing Counters
........................................................40

4.5.4.2	Bit Selection
....................................................................40

4.5.4.3	Vertical Scrolling
..........................................................41

4.5.5	VRAM Addressing Multiplexing
......................................................41

4.5.6	LIGHT PEN
............................................................................................41

4.5.6.1	Introduction
......................................................................41

4.5.7	CO-ORDINATE COUNTERS, DEGLITCHER, PIA, TIMER
......................42

4.5.7.1	Hit Deglitcher
..................................................................42

4.5.7.2	Hit and Touch Receivers
................................................42

4.5.7.3	Co-ordinate Latches
........................................................42

4.5.7.4	Control PIA
........................................................................43

4.5.7.5	Timer
....................................................................................43

4.5.8	VIDEO MEMORY VRAM
............................................................................43

4.6	CMI02 MASTER CARD FUNCTIONAL DESCRIPTION
..........................................44

4.6.0	INTRODUCTION
......................................................................................44

4.6.1	ADDRESS DECODING, CHANNEL SELECTION,

MASTER TUNING REGISTER
................................................................44

4.6.1.1	Address Decoding
..............................................................44

4.6.1.2	Channel Selection
............................................................44

4.6.1.3	Master Tuning Register
..................................................45

4.6.2	INTERRUPT CONTROL, MASTER OSCILLATOR,

MEMORY CONTROL
................................................................................45

4.6.2.1	Interrupt Control
............................................................45

4.6.2.2	Master Oscillator
............................................................45

4.6.2.3	Memory Control
..................................................................45

4.6.3	ANALOG TO DIGITAL CONVERTER
........................................................46

4.6.4	A-D FILTER SYSTEM
............................................................................46

4.7	CMI01-A CHANNEL CARD FUNCTIONAL DESCRIPTION
....................................47

4.7.1	INTRODUCTION
......................................................................................47

4.8	CMI04 AUDIO MODULE FUNCTIONAL DESCRIPTION
........................................48

4.8.1	INTRODUCTION
......................................................................................48

4.8.2	MIXER, LINE DRIVERS
........................................................................48

4.8.2.1	Mixer
....................................................................................48

4.8.2.2	Line Drivers
......................................................................48

4.8.3	MONITOR AMP, INPUT AMPS, SYNC IN/OUT
......................................48

4.8.3»1 Monitor Amplifier
............................................................48

4.8.3.2	Input Amplifiers
..............................................................49

4.8.3.3	Sync In/Out
........................................................................49

4.8.4	POWER SUPPLY
...............................................................49
4.9	QPSA POWER SUPPLY FUNCTIONAL DESCRIPTION
........................50

4.9.1	INTRODUCTION
.................................................50

4.9.2'UNREGULATED SUPPLIES
...................................	50

4.9.3	REGULATOR 5 VOLT 18 AMP
.................................50'

4.9.4	+ 12 VOLT, 24 VOLT SUPPLIES
.............................51

4.10	Q13T FRONT PANEL FUNCTIONAL DESCRIPTION
...............................52

4.10.1	INTRODUCTION
....................................................................................52

4.10.1.1 Operation
................................................................52

4.10.2	COMMUNICATIONS PORT
......................................................................52

4.11	Q077 HARD DISK CONTROLLER DMA INTERFACE

FUNCTIONAL DESCRIPTIONAL ...............................53

4.11.1	INTRODUCTION
....................................................................................53

4.11.2	ADDRESS MAP
............................................53

4.11.3	COMMANDS
........................................................54

4.11.4	DMA ADDRESS COUNTERS
..................................................54

4.11.5	DMA BYTE TRANSFER COUNTERS
......................................55

4.11.6	DATA BUFFERS ........................................
...55

4.11.7	ADDRESS DECODING, CONTROLLER
.................................................55

4.11.8	DMA LOGIC
.........................................................56

4.11.9	CONTROL REGISTER
...............................................56

4.11.10	DEVICE DRIVER ROM
......................................56

4.12	CMI28 GENERAL INTERFACE FUNCTIONAL DESCRIPTION
.......................57

4.12.1	INTRODUCTION
....................................................................................57

4.12.2	MEMORY CONFIGURATION
................................................57

4.12.3	68000/6809 DMA BUSS INTERFACE
.................................58

4.12.4	DEBUGGING NOTES FOR DMA CIRCUITRY
..........................................61

4.12.5	SMPTE/MIDI CARD PERIPHERAL CIRCUITS
......................................61

4.12.6	INTERRUPTS
......................................................62

4.12.7	SMPTE GENERATING CIRCUITRY
.............................62

4.12.8	SMPTE READING CIRCUITRY
..................................63

4.12.9	SYNC IN AND OUT
.............................................63

4.12.10	GENERAL INTERFACE SUPPORT CARD
.........................64

4.12.11	26 WAY PIN CONNECTIONS
..............................................................65

4.12.12	20 WAY PIN CONNECTIONS
....................................66

4.12	CMI07 ANALOG INTERFACE FUNCTIONAL DESCRIPTION
.............67

5. TROUBLESHOOTING
.................................................................................................68

5.1	INTRODUCTION
............................................................................68

5.2	POWER SUPPLY
..................................................68

5-3 COMPUTER SECTION
............................................................69

5.4	DISK SYSTEM
............................................................70

5.5	CHANNEL CARDS
........................................................................70

5.6	MASTER CARD
........................................................................70

5.6.1	CHANNEL CARD SELECTION
...............................................71

5.6.2	CHANNEL CARD MASTER CLOCK
.................................................71

5.6.3	ANALOG TO DIGITAL CONVERSION
..................................71

5.6.4	EXTERNAL SYNCHRONISATION AND TIMER
............................71

5-7 AUDIO CARD
....................................................72
6. DIAGNOSTIC SOFTWARE
................................................ 73

6.1	INTRODUCTION TO DIAGNOSTIC SOFTWARE ...............
............ . 73

6.1.1	RUNNING THE DIAGNOSTIC SOFTWARE
..............................73

6.1.2	CHAIN FILE DIAGNOSTICS
................................. 73'

6.1.3	RUNNING INDIVIDUAL TEST PROGRAMS
.............................75

6.1.4	MEASUREMENT TOLERANCES ............................•. 76

6.2	CHANNEL CARD TESTS
............................................... 76

6.2.1	TRIMMING TESTS
.......................................... 77

6.2.2	FILTER TESTS
..........---.................................................81

6.2.3	WAVEFORM MEMORY TESTS ............................ 83

6.2.4	MEMORY DUMP
............................................ 85

6.2.5	ENVELOPE CONTROL TESTS
..............................................85

6.2.6	VOLUME CONTROL TESTS
................................... 87

6.2.7	TIMER TESTS
............................................. 88

6.2.8	PITCH AND OCTAVE CONTROL
------------------------------------ 89

6.2.9	INTERRUPT FLAGS ........
................................... 89

6.3	MASTER CARD TESTS
...........................................................91

6-3-1 TIMER TESTS
............................................ 91

6.3.1.1	Timer Tests .................................... 91

6.3.1.2	Click Out/Sync In Tests
........................................92

6.3.2 MASTER PITCH REGISTER TEST
............................... 93

6.3-3 A-D CONVERTER SYSTEM TESTS
............................. 94

6.3-3.1 AD Tests Using External Analog Source .......... 94

6.3.3.1	AD Tests Using Internal Analog Source .......... 95

6.3.4 MASTER BANDPASS FILTER TESTS
........................... 101

6.4	Q256 MEMORY CARD DIAGNOSTICS
...............................................103

6.4.1	COMMON INITIALIZATION, OPTIONS AND

TEST PROCEDURES
...................................................104

6.4.2	MEM256
................................................. 106

6.4.3	MAP256
.............................................................109

6.4.4	DMA256
..............................................----- 113

6.4.5	MEMDBG
................................................. 113

6.4.5.1	Use of MEMDBG .................................. 114

6.4.5.2	Adding Your Own Test Loops ..................... 114

6.5	Q133 CENTRAL PROCESSOR CONTROL MODULE
........................ 116

6.5.1	USER PERIPHERAL INTERFACE ADAPTER
.......................116

6.5.2	SYSTEM TIMER
.....................................................117

6.5.3	INTERRUPTS
.......................................................11 8

6.5.4	ACIA
................................................................118

6.6	Q219 LIGHTPEN/GRAPHICS TEST
................................... 119

6.6.1	LGTST
.........................................-......... 119

6.6.2	LIGHTPEN TIMERS
........................................ 119

6.6.3	LIGHTPEN PIA
....................................................120

6.6.4	PROCESSOR ACCESS SELECTION
_____..____________________________________120

6.6.5	LIGHTPEN DRAWING
......................................... 120

6.6.6	VIDEO RAM TESTING
........................................ 121
6.7	INTERRUPT TESTS
..............................................122

6.7.1	CMIINT
.................................................... 122

6.7.2	CMIINT COMMANDS
...............................................123

6.7.3	GENERAL PROCEDURE OF TESTS
.............................124

6.7.4	ERROR MESSAGES
.........................................125

6.7.5	INTERRUPT PRIORITY ERRORS DIAGRAM
...................... 126

6.8	CHAIN TESTS
.................................................. 127

6.8.1	TESTING A COMPLETE CMI
.................................127

6.8.2	DIGITAL SYSTEM TESTS
*.................................. 127

6.8.3	COMPREHENSIVE ANALOG TEST
..............................128

6.9	SUMMARY OF TEST WAVEFORMS
....................................129

6.9.1	CMITST WAVEFORMS
........................................130

6.9.2	FILTER FREQUENCY RESPONSE - REVS 1 & 2
.................132

6.9.3	FILTER FREQUENCY RESPONSE - REV 3
.....................-133

6.10	CMI07 ANALOG INTERFACE CARD
................................. 134

6.10.1	STARTING THE AIC TESTS
................................. 134

6.10.2	REQUIRED HARDWARE CONFIGURATION
.......................134

6.10.3	AIC RAM TEST
.......................................... 134

6.10.3.1	Program Flow of the RAM Test ................. 135

6.10.4	AIC MULTIPLEXOR TEST
.................................. 135

6.10.4.1	Program Flow of the MUX Test .................. 136

6.10.3 AIC ANALOG TEST
.......................................136

6.10.3.1	Program Flow of the DAC Test ................. 137

6.10.6 AIC TUNING
............................................ 137

6.10.6.1	AIC Input Tuning ............................. 137

6.10.6.2	AIC Output Tuning ............................. 138

7. SIGNAL LIST - INTERNAL CONNECTIONS
.................................139

7.0	MOTHERBOARD SIGNAL LIST
.........................................139

7.1	COMMON SIGNALS BUSSED TO ALL SLOTS
............................140

7.2	SLOT 1: MASTER CARD CMI-02
....................................141

7.3	SLOT 2: GENERAL INTERFACE CARD CMI-28
..............................142

7.4	SLOT 3 TO 10: CHANNEL CARD CMI-01-A
.............................................143

7.5	SLOT 11: ANALOG INTERFACE CARD CMI-07
.........................144

7.6	SLOT 12: 64k SYSTEM RAM Q096 (not used)
............................................145

7.7	SLOT 13» 14: 256K SYSTEM RAM Q256
..........................................146

7.8	SLOT 15: FOUR PORT ACIA MODULE QÖ14
.................................147

7-9 SLOT 16: PROCESSOR CONTROL MODULE Q133
.......................	148

7.10	SLOT 17: CENTRAL PROCESSOR MODULE Q209
*..............................150

7.11	SLOT 18: LIGHTPEN/GRAPHICS INTERFACE Q219
.........................151

7.12	SLOT 19: FLOPPY DISK CONTROLLER QFC9
......*...................152

7.13	SLOT 20: HARD DISK CONTROLLER Q077
...........................152
.	SIGNAL LIST - EXTERNAL CONNECTIONS
..........................................153

8.1	A.C. MAINS
.............................................................153

8.2	GRAPHICS POWER
........................................................153

8.3	GRAPHICS
........................................................153

8.4	KEYBOARD POWER
....................................................154

8.5	KEYBOARD
...........................................................154

8.6	PRINTER
---------------------------------------------------........	155

' 8.7 PHONES
............................................................155

8.8	MONITOR
........................................................	156

8.9	CHANNELS 1 to 8
...........................................................156

8.10	MIXED LINE OUTPUT
.....................................................156

8.11	SYNC
.........................................................	157

8.12	FILTER OUT
..................................................157

8.13	MIC IN
.............................................................157

8.14	LINE IN
.......................................................	158

8.15	ADC DIRECT
........................................................158

9.	REMOVE/REPLACE PROCEDURE
----..........----------------------------------------------159

9 .1 MAINFRAME FRONT PANEL REMOVE/REPLACE
..............................159

9-2 CIRCUIT BOARD REMOVE/REPLACE
.................................	159

9-2.1 CIRCUIT BOARD REMOVAL
.......................................159

9.2.2 CIRCUIT BOARD REPLACEMENT
...............................159

9.3 MAINFRAME REAR PANEL REMOVE/REPLACE
..............................1 60

9-4 AUDIO BOARD, CMI-04 REMOVE/REPLACE
.................................161

9.4.1	AUDIO BOARD REMOVAL
...............................................161

9-4.2 AUDIO BOARD REPLACEMENT
........................................161

9.5 TOP COVER REMOVE/REPLACE
...........................................162

9 • 6 SIDE COVER REMOVE/REPLACE
........................................162

9.7	BOTTOM COVER REMOVE/REPLACE
................................................162

9.8	DISK DRIVE REMOVE/REPLACE
.........................................163

9.8.1	DISK DRIVE REMOVAL
.....................................................1 63

9.8.2	DISK DRIVE REPLACEMENT
.................................164

9.9	FAN ASSEMBLY REMOVE/REPLACE
.....................................164

9.10	CARD CAGE REMOVE/REPLACE
................................................164

9.10.1	CARD CAGE REMOVAL
.........................................164

9.10.2	CARD CAGE REPLACEMENT
...................................165

9.11	REGULATED POWER SUPPLY ASSEMBLY REMOVE/REPLACE
.....................166

9.11.1	REMOVAL
................................................	166

9.11.2	REPLACEMENT
...........................................167

9.12	MOTHERBOARD REMOVE/REPLACE
..................................167

9.12.1	REMOVAL
.....................................................167

9.12.2	REPLACEMENT
......................................................167

9.13	TRANSFORMER END PLATE REMOVE/REPLACE
.............................1 69

9.13.1	REMOVAL
.............................................................169

9.13.2	REPLACEMENT ..........
........................................1 69

10.	REPAIR PROCEDURE
...................................................170
11.	PREVENTATIVE MAINTENANCE
........................................170
SCHEMATIC DIAGRAMS
................................................171

12.1	Q209 DUAL 6809 CPU
................................................................172

12.2	Q133 CPU CONTROL
.....................................................176

12.3	Q256 256K MEMORY
............................................	181

12.4	QFC9 FLOPPY DISK CONTROLLER
.....................................187

12.5	Q219 LIGHTPEN/GRAPHICS
............................................................................193

12.6	CMI02 MASTER CARD
......................................................................................199

12.7	CMI01-A CHANNEL CARD
..............................................203

12.8	CMI04 AUDIO MODULE
------*.....................................204

12.9	QPSA POWER SUPPLY
............................................207

12.10	Q137 FRONT PANEL
....................................................................209

12.11	Q077 HARD DISK CONTROLLER
...............................................210

12.12	CMI28 GENERAL INTERFACE
.......................■..........................215

12.13	CMI07 ANALOG INTERFACE
.......*.................................................225

12.14	MAINFRAME WIRING DIAGRAM
...............................................229

13* EXPLODED VIEWS
'...........................................■..............230

13-1 TRANSFORMER' END PLATE
..........................................231

13.2 CARD CAGE ASSEMBLY
..........................................	232

13-3 REGULATED POWER SUPPLY
..............................................233

13-4 FAN ASSEMBLY
.....................................................234

13.5 REAR PANEL
...................................................235

13-6 FRONT PANEL
....................................................236

13-7 MAINFRAME
.......................................................237

14. MECHANICAL PARTS LISTS
................................................238

14.1	MAINFRAME DRAWING REF DMC0001
...............................	238

14.2	CARD CAGE ASSEMBLY DRAWING REF DMC032
..............................................239

14.3	MAINFRAME REAR PANEL DRAWING REF DMC038
..........................................240

14.4	FRONT PANEL ASSEMBLY DRAWING REF DMC042
........................241

14.5	TRANSFORMER END PLATE DRAWING REF DMC046
.....................242

14.6	REGULATED POWER SUPPLY DRAWING REF DMC057
......................243

14.7	FAN ASSEMBLY DRAWING REF DMC066
.............................	243
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